GATE Electronics and Communications (EC) 2022 Solved Paper

Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width (W) to gate length (L) ratios $\left(\frac{\mathit{W}}{\mathit{L}}\right)$ of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the pMOSFET, the threshold voltage is -1 V and the mobility of holes is 40 $\frac{\mathit{c}{\mathit{m}}^2}{\mathit{V}.\mathit{s}}$. For the nMOSFET, the threshold voltage is 1 V and the mobility of electrons is 300 $\frac{\mathit{c}{\mathit{m}}^2}{\mathit{V}.\mathit{s}}$ The steady state output voltage V₀ is _________.