GATE Electrical Engineering (EE) 2021 Solved Papers

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Question : 39 of 65
 
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A CMOS Schmitt-trigger inverter has a low output level of 0V and a high output level of 5V. It has input thresholds of 1.6V and 2.4V. The input capacitance and output resistance of the Schmitt-trigger are negligible. The frequency of the oscillator shown is ___________ Hz. (Round off to 2 decimal places.)
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