GATE Electrical Engineering (EE) 2021 Solved Papers

Question : 21 of 65

Marks: +1, -0

A 16-bit synchronous binary up-counter is clocked with a frequency

{f}_{ {CLK}}

. The two most significant bits are OR-ed together to form an output Y. Measurements show that Y is periodic, and the duration, for which

Y

remains high in each period is 24 msec. The clock frequency

f_{C L K}

is _________MHz. (Round off to 2 decimal places).

Your Answer:

Validate

Solution:

For a 16-bit synchronous binary counter:
Total combination (no. of states) = 216
In 216 combination, half of it having MSB " 1 " and in remaining half again having

{D}_{14}

is high.
Output will become high

=2^{15}+\;{2^{15}}/{2}=3 × 2^{14}

3 × 2^{14} × T_{ {CLK}}=24 × 10^{-3} {sec}

T_{ {CLK}}=\;{8 × 10^{-3}}/{2^{14}} {sec}

T_{ {CLK}}=\;{1}/{2^{11}} {msec}

f_{ {CLK}}=2^{11} {kHz}

f_{ {CLK}}=2.048 {MHz}

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