GATE Electrical Engineering (EE) 2011 Solved Paper
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Question : 56 of 65
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A two-bit counter circuit is shown below
If the state QA QB of the counter at the clock time tn is ‘10’ then the state QA QB of the counter at tn + 3 (after three clock cycles) will be
If the state QA QB of the counter at the clock time tn is ‘10’ then the state QA QB of the counter at tn + 3 (after three clock cycles) will be
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