GATE Computer Science (CS) 2017 Shift 2 Solved Paper
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Question : 52 of 65
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The next state table of a 2-bit saturating up-counter is given below.
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are
|
Q1 |
Q0 |
|
|
|
0 |
0 |
0 |
1 |
|
0 |
1 |
1 |
0 |
|
1 |
0 |
1 |
1 |
|
1 |
1 |
1 |
1 |
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are
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