GATE Computer Science (CS) 2017 Shift 1 Solved Paper

Question : 43 of 65

Marks: +1, -0

Consider a combination of T and D flip-flops connected as shown below. The output of the D flip-flop is connected to the T flip-flop and the output of the T flip-flop is connected to the input of the D flip-flop.

Initially, both Q₀and Q₁are set to 1 (before the 1^st clock cycle). The outputs

Q₁Q₀ after the 3^rd cycle are 11 and after the 4^th cycle are 00 respectively
Q₁Q₀ after the 3^rd cycle are 11 and after the 4^th cycle are 01 respectively
Q₁Q₀ after the 3^rd cycle are 00 and after the 4^th cycle are 11 respectively
Q₁Q₀ after the 3^rd cycle are 01 and after the 4^th cycle are 01 respectively

Validate

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